In the course of manufacturing an integrated circuit, common practice is to first develop desired semiconductor circuit elements and the corresponding interconnections on an appropriate substrate, followed by the application of a dielectric material over the resulting structure for purposes of protecting the relatively fragile underlying elements. This is conventionally followed by a process for leveling irregularities in the dielectric overlayer to restore topological planarity to the manufactured component. Chemical-mechanical polishing (CMP) of the surface of the applied dielectric material is commonly used for such purposes.
Chemical-mechanical polishing has a disadvantage, however, in practice: the CMP process can itself damage or scratch the surface of the wafer being formed. Scratches can occur, for example, by dragged or rolling contact from particles present in the polishing pad, from the polishing slurry, or from the wafer itself. Cracks can be nucleated and initiated from such scratches or other particle contacts and propagated by tension in the wafer arising from CMP fixturing, and the stress-corrosive properties of the reactive CMP solution. The analysis of manufactured complementary metal-oxide-semiconductor (CMOS) products has revealed that scratches can lead to cracks propagating downwardly through one or more of the layers positioned beneath the polished surface.
For example, in manufacturing CMOS products, it has been found that a scratch occurring during the metal conductor/glass CMP step can initiate a crack that propagates through several layers of material, including the gate stack (which is itself a very brittle structure). Electrically, such a crack can be detected as an "open" gate. Analysis of such failures (using a scanning electron microscope) reveals that such cracking can dislocate the gate stack leading to a physical break in the gate, which prevents current from passing through the structure. Although the scratch can be partially removed from the surface layer by subsequent polishing, the crack has already damaged the lower layers of the manufactured article.
Therefore, the primary object of the present invention is to prevent cracks initiated in the surface of a dielectric material from propagating downwardly, into the underlying layers of a manufactured integrated circuit. Another object of the present invention is to prevent cracks initiated in the surface of a dielectric material from propagating downwardly, into underlying layers, in a way that is fully compatible with the existing processes used to manufacture integrated circuits, and that itself requires the use of a minimal number of additional manufacturing steps.